Prior art devices and systems are found to use forms of all pass type sections to (1) provide a bulk delay characteristic and to provide amplitude correction, or (2) provide a single fixed bulk delay characteristic.
The present invention directed to the programmable enablement seeks to provide an advantage over prior art systems having single fixed bulk delay response shape in that greater range, flexibility and quality of delay response correction is attained and is programmed with an accomplished ease and facility not seen provided in the prior art.
The present invention also seeks to provide an advantage over the prior art systems in that the bulk delay can be taken out without disabling the amplitude correction circuitry.
A bulk delay circuit according to the invention provides gross delay correction to the channel while in general making no correction to the amplitude response. Use of these circuits in an equalizer provides two main advantages. First of all the delay correction capability of the equalizer is extended; secondly, the magnitude of the ripple in the delay response is reduced.
Described as a circuit, a bulk delay circuit of the invention may be made by cascading a number of second order "all pass" sections (as shown in FIG. 1). Each "all pass" section has a transfer characteristic ##EQU2##